Clarification: Should Integrator blocks be included
in the dependency graph ?
During the cycle detection and sorting, the integrator
blocks must be ignored. The integrator blocks are not
incuded in the dependency graph. In the block diagram, integrator
blocks are connected in the same way as all other blocks.
An integrator block does however compute a future
value of a variable rather than a current one. Only algebraic blocks
and their connections can give rise to algebraic (instantaneous, at
a single point in simulated time) loops and need to be sorted to
guarantee correct simulation results.
In pseudocode:
check algebraic loops (do not include integrator blocks)
sort algebraic blocks (do not include integrator blocks)
initialize outputs of algebraic blocks to 0
initialize outputs of integrator blocks to IC
t := t_initial
while (termination condition not satisfied)
{
update algebraic blocks
output
update integrator blocks (values at t + delta_t)
t := t + delta_t
}
Clarification: What is a Communication Interval ?
A numerical simulator iteratively updates the state variables
and advances the simulation time. In a Time Slicing simulator
for Causal Block Diagrams, the simulator has a main loop in which
the state of each block is updated based on the state of its
influencers. Algebraic blocks are processed first (in sorted order),
then all the integrator blocks. After all blocks have been processed,
the time is advanced by the time-increment (given by the experimentation
environment user). In the case of Time Slicing, the time advance
comes from the Euler discretization of the integrating blocks.
The loop will stop if some termination condition is reached.
For numerical accuracy reasons, it may be necessary to set the
time-advance (delta_t) to a very small value. The output (in file or
on plot) the user wants may not require this resolution. Thus,
the user gives a Communication Interval (CI). After every CI time-interval,
output will be generated and not necessarily at every time slice !
Note that you could (but optional for the assignment)
speed up your simulation considerably if you
did a dependency analysis to figure out which blocks are not needed
to compute new values of state variables (i.e., input to integrator
blocks). These blocks are part of the output function rather than
of the transition function (see class on system specification)
and need only be computed at communication intervals.
Model the behaviour of the CDplayer GUI shown below
(play/pause, time display and track advance only).
Bear in mind that this model should allow simulation
and/or synthesis of executable code.
Due date: 5 November 2001 (before midnight).
4. GPSS Chapter 9 assignments
Due date: 12 November 2001 (before midnight).
5. GPSS Chapter 10 assignments
Due date: 19 November 2001 (before midnight).
If you solved assignment N of Chapter 9, you must
solve assignment (8 - N) of Chapter 10.
