There are twenty-five (yes, twenty-five !!!) addressing modes on the Motorola 68040 chip. Some of them are quite difficult to master and are almost never used, because they were provided for the benefit of such people as compiler writers, who sometimes don't even bother to try them out themselves. For this reason, I will concentrate, in this section, on the more "basic" ones, whatever that means. The addressing modes described in this section should be useful for at least some of your assembler programs. As for the more complicated ones, they are described in detail in appendix A.
These eighteen addressing modes are subdivided unevenly into eight main addressing modes, numbered from 0 to 7. Modes 0 through 5 represent only one basic addressing mode, while mode 6 encompasses eight different ones, and mode 7 is used to represent the remaining eleven. In this section, we will only deal with modes 0 through 5, and with three of the cases for mode 7.
Mode 0: Data Register Direct
This is one of the simplest of them all. In this mode, the operand is contained in a data register. The basic NeXT syntax for it is "dn".
Example 3.1: movel d0, d1
This instruction moves the whole 32 bit from register d0 to register d1. In this case, both the source and destination operands are in the data register direct addressing mode.
Mode 1: Address Register Direct
This mode is very similar to the previous one. The only difference is that address registers are concerned. The NeXT syntax for it is "an". One can also use the stack pointer (syntax "sp" or "a7"); however, you should keep in mind that this is the processor stack pointer, so you have to make sure, when changing it, that you don't lose some useful information that was on the stack.
Example 3.2: moveal a2, a3
This instruction moves the contents from register a2 into register a3. Both the source and destination operands are in the address register direct addressing mode.
Mode 2: Address Register Indirect
Now were getting just a bit more serious. In this mode, the contents of the address register are considered as the address of the operand. Another way of saying it is that the address register points to the memory location of the operand. The NeXT syntax for it is "an@", or "sp@".
example 3.3: movel d0, a5@
In this example, the contents of register d0 are stored into the memory location whose address in register a5.
Mode 3: Address Register Indirect with Postincrement
This mode and the one the follows are very useful for the implementation of a stack. This mode is the same as the address register indirect, except that the contents of the address register are incremented by the size of the operand after the memory location has been accessed. If the operand is a byte, the address register is incremented by 1; it is incremented by 2 if the operand is a word, and by 4 if the operand is a long word. The NeXT syntax for it is "an@ +" or "sp@+".
example 3.4: moveb a0@+, d0
In this example, the byte that is stored in the memory location pointed to by register a0 is stored into the least significant byte of register d0; then, register a0 is incremented by one.
Mode 4: Address Register Indirect with Predecrement
This mode is the same as the address register indirect mode, except that the contents of the address register are decremented by the size of the operand before the memory location is accessed. This means that the actual location addressed is not the which the address register points to at the beginning of the instruction, but the one pointed to after the change. The NeXT syntax for it is "an@-" or "sp@-".
example 3.5: movel d1, sp@-
This last instruction moves the contents of register d1 into the memory location that "sp" points to after its been decremented by 4 (were moving a long word). Another way of saying it is "push" d1 on the stack. You probably see what I'm getting at here.....
There is no explicit "push" or "pop" operation on the Motorola processor. Instead, it is done through the use of the last two addressing modes. Mode 3 will have the effect of a "pop", when applied to the stack pointer, and mode 4 will have the effect of a "push". Note that the stack grows downwards in memory: the absolute address of the top of the stack will always be smaller than the absolute address of any other element on the stack.
There are several advantages to this whole approach. One of the great advantages is that we dont have to use "sp" if we dont want to: we can implement our own stack, or have several stacks, by using other address registers with the same addressing modes. We can also combine a few operations:
example 3.6: addl sp@+, d4
In this last example, the contents on top of the stack are popped up and added to the contents of register d4; the result is stored in d4 also. On other chips, we might have had to do a "pop" instruction, and then an "add".
Mode 5: Address Register Indirect With Displacement
This mode allows us to combine a 16-bit displacement with a given address registers contents to get to our memory location. This 16-bit value is first sign-extended, and then added to the address register to get the address were looking for. The NeXT syntax for it is "an@ (constant)" or "sp@ (constant)".
example 3.7: movel a2@(20), d5
Note that the displacement is in bytes. Negative offsets can also be used; just put the minus" sign inside the parentheses (i.e. "an@ (-constant)").
Mode 7
The next three addressing modes are all grouped under the banner of addressing mode 7. How does the processor know which one to use? Each instruction has a minimum of six bits specifying the addressing mode for a given operand. The first three bits specify the mode; the last three the register. It is this register bit field that is used to tell the processor which mode to implement, when it is given addressing mode 7. There is no problem with the fact that the register field is used since, as we will see, none of these modes need to specify which register to use.
Mode 7, registers 0 and 1: Absolute Address
This mode allows us to use the absolute address of a memory location as an operand. The operands can be 16 or 32 bits wide. When register 0 is specified, the processor will expect the address to be a 16-bit quantity, and will sign-extend it to 32 bits; when register 1 is specified, it will expect a 32-bit quantity. These register fields are set by the assembler itself, so you dont have to worry about them; I only documented them for completeness of presentation. The NeXT syntax for it is simply addr. The use of labels for addresses is a must, if we want our code to be relocatable.
Example 3.8:
In the instructions discussed in this manual, this addressing mode is always legal when the address register indirect mode is legal.
Mode 7, register 2: Program Counter Indirect with Displacement
This one works more or less the same way as the address register indirect with displacement, except that the register used is the program counter. There are a couple of differences worth pointing out, however. First of all, the displacement must be a 16-bit number, which will be sign-extended to 32 bits; this means that a displacement should not be greater than 32, 767, or lower than -32, 768. Also, this mode cannot be used for a destination operand. The NeXT syntax for it is "pc@ (constant)".
Mode 7, register 4: Immediate
This mode allows us to use constants as operands. The NeXT syntax for it is "#constant".
example 3.9: addl #20, d3
This instruction adds 20 to the contents of register d3, and the result is stored in register d3.
Note that constants, be it for displacements, or for the immediate addressing mode, can be specified in several ways.
They can be:
The addressing modes described above are the most basic ones. You might not even need to use all of them: the program counter indirect mode, for instance, is very seldom used in the type of programming one usually has to do. Still, it is better to know about a feature that you might not have to use, than to be unaware of its existence with the risk of needing it.
Copyright
© McGill University, 1998. All rights reserved.